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Added FCCID
===Early Generation Dual Board based on M16C processor===
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File:LandisGyr PCBD-00106 Rev06 Top.JPG|Dual board meter, older design, brain/network board top
File:LandisGyr PCBD-00106 Rev06 Bot.JPG|Dual board meter, older design, brain/network board bottom
File:LandisGyr PWB-72127 RevA Bot.JPG|Dual board meter, older design, metering board top
File:LandisGyr PWB-72127 RevA Top.JPG|Dual board meter, older design, metering board bottom
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===Generation 4 based on M16C processor===
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File:LandisGyr PCB Blank1.JPG|Blank PCB Components side
File:LandisGyr PCB Blank2.JPG|Blank PCB Screen and Buttons side
File:LandisGyr PCB 24-1082 RevAE Sand1.jpg|Component side ground plane and traces sanded off
File:LandisGyr PCB 24-1082 RevAE Sand2.jpg|Component side ground plane and screen side sanded off
File:LandisGyr PCB 24-1082 RevAE Sand3.jpg|Screen side ground plane
File:LandisGyr PCB 24-1082 RevAE Sand4.jpg|Screen side ground plane sanded off showing internal layer traces
File:LandisGyr PCB 24-1082 RevAE.JPG|PCB with EM250 Zigbee chip and lower accuracy Teridian chip
File:LandisGyr PCB 24-1562 RevAA.JPG|PCB with EM357 Zigbee chip and higher accuracy Teridian chip
</gallery>
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===Generation 5 smart meter based on ARM Cortex-M processor (FCCID R7PEG1R1S6)===
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File:LandisGyr PCB 24-2411 RevAC TopScreen.JPG|Top of Gen5 meter board with LCD screen
File:LandisGyr PCB 24-2411 RevAC TopNoScreen.JPG|Top of Gen5 meter board with the LCD screen removed
File:LandisGyr PCB 24-2411 RevAC Bottom.JPG|Bottom of Gen5 meter board, ATSAM4C32 processor is under the large brown capacitor seen in the bottom middle of the PCB.
File:LandisGyr PCB 24-2411 RevAC JTAGSolderPoints.jpeg|Red circled spots are missing 0 ohm resistors you need to solder bridge to enable JTAG connector to function.
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