==Repairs -==
After confirming the firmware of the CPLD and the Flash seem intact, I flashed Flashed the firmware onto a new NOR flash chip. I also SRAM replaced the SRAM (these are almost a consumable, and ) I have had one of this range fail before, in a different package) This device has seen some use. Not ahead of time, if the NOR got warm enough to dry out half the pins completelybut yeah it failed.
I Other ICs were replaced the other chips I had removed. I fixed the traces on the board with new pcb traces. I had to repair a leg of a custom Alesis IC (there are three, two small one largeincluding CPU) Traces repaired (almost 20). The chip was bridged with a factory bodge Most of a capacitor. Removing that, broke the leg off the IC. I was able to grind away the epoxy and solder a new leg in placewhich surrounding CPU. Almost 20 traces have been repaired.
Leg of a custom Alesis IC was repaired (there are three custom Alesis chips, two small one large). This 8 pin chip was bridged vcc/gnd with a capacitor (factory modification). Removing the cap, broke the leg off the IC. I was able to grind away the epoxy and solder a new leg in place. All the pins on the 100 pin Xilinx and 100 pin Alesis IC were reflowed and any other flaky looking connections. The LEDs LED legs had metal fatigued off with all the repairs. I ground away the solder resist and was able to solder them directly to the board again. (they LEDs are a custom design package. Also, I like its best to use the original, : only the legs were broken after all).<gallery>
File:Dif-at-tracerepair.png|alt=Traces replaced and connected.|Traces replaced and connected.
File:Dif-at-tracerepair2.png|traces tinned (way too much, I took some off with wick)