Mermaid:RE FlowChart Overview: Difference between revisions
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flowchart TD | flowchart TD | ||
subgraph RE_Physical-Analysis [Physical Analysis] | |||
direction LR | |||
Target_Selection([Target\n Selection]); click Target_Selection "https://www.mediawiki.org" | |||
Identify_Components[Identify\n Components]; click Identify_Components "/view/Main_Page" | |||
Create_Block_Diagram[/Create\n Block\n Diagram/] | |||
Contains_Prog_IC{Contains\n Programmable\n IC?} | |||
Complete_Documentation([Complete\n Documentation]) | |||
End_Phase1((Extract Data)) | |||
Target_Selection --> Identify_Components | |||
Identify_Components --> Create_Block_Diagram --> Contains_Prog_IC -->|No| Complete_Documentation | |||
Contains_Prog_IC -->|Yes| End_Phase1 | |||
end | |||
subgraph RE_Prog-Extraction [Programmable Device Extraction] | |||
direction LR | |||
Start_Phase2((Extract Data)) | |||
end | Chip_Locked{Chip\n Locked?} | ||
Read_Chip_Memory[/Extract\n Chip\n Memory/] | |||
Vulnerability_Exists{Vulnerability\n Exists?} | |||
Exploit_Chip[Exploit\n Chip] | |||
Find_Vuln[Find\n Vulnerability] | |||
Start_Phase2 --> Chip_Locked | |||
Chip_Locked -->|No| Read_Chip_Memory | |||
Chip_Locked -->|Yes| Vulnerability_Exists | |||
Vulnerability_Exists -->|Yes| Exploit_Chip | |||
Vulnerability_Exists -->|No| Find_Vuln | |||
end | |||
subgraph RE_Induced-Fault [Fault Injection Workflow] | |||
direction LR | |||
subgraph FI_Side-Channel [Side Channel Analysis]; end | |||
subgraph FI_Voltage [Voltage Fault Injection]; end | |||
subgraph FI_EM [Electromagnetic Fault Injection]; end | |||
FI_Side-Channel --> FI_Voltage | |||
FI_Side-Channel --> FI_EM | |||
end | |||
subgraph RE_Microscope-Extraction [Microscope Workflow] | |||
direction LR | |||
ME_Sample-Preparation[Sample Preparation] | |||
subgraph ME_Optical-Extraction [Optical Microscope]; end | |||
subgraph ME_Electron-Extraction [Electron Microscope]; end | |||
ME_Sample-Preparation --> ME_Optical-Extraction | |||
ME_Sample-Preparation --> ME_Electron-Extraction | |||
end | |||
subgraph RE_Firmware [Firmware Reverse Engineering] | |||
direction LR | |||
subgraph FW_Tool-Selection [Tool Selection]; end | |||
subgraph FW_Tool-Configuration [Tool Configuration]; end | |||
subgraph FW_AI-Usage [Using AI]; end | |||
subgraph FW_Beginner [Getting Started]; end | |||
subgraph FW_Intermediate [Intermediate]; end | |||
subgraph FW_Advanced [Advanced Techniques]; end | |||
FW_Tool-Selection --> FW_Tool-Configuration --> FW_Beginner --> FW_Intermediate --> FW_Advanced | |||
FW_Beginner --> FW_AI-Usage | |||
end | |||
RE_Physical-Analysis --> RE_Prog-Extraction | |||
RE_Prog-Extraction --> RE_Induced-Fault | |||
RE_Prog-Extraction --> RE_Microscope-Extraction | |||
RE_Induced-Fault --> RE_Firmware | |||
RE_Microscope-Extraction --> RE_Firmware | |||
Latest revision as of 23:42, 22 September 2026
flowchart TD
subgraph RE_Physical-Analysis [Physical Analysis]
direction LR
Target_Selection([Target\n Selection]); click Target_Selection "https://www.mediawiki.org"
Identify_Components[Identify\n Components]; click Identify_Components "/view/Main_Page"
Create_Block_Diagram[/Create\n Block\n Diagram/]
Contains_Prog_IC{Contains\n Programmable\n IC?}
Complete_Documentation([Complete\n Documentation])
End_Phase1((Extract Data))
Target_Selection --> Identify_Components
Identify_Components --> Create_Block_Diagram --> Contains_Prog_IC -->|No| Complete_Documentation
Contains_Prog_IC -->|Yes| End_Phase1
end
subgraph RE_Prog-Extraction [Programmable Device Extraction]
direction LR
Start_Phase2((Extract Data))
Chip_Locked{Chip\n Locked?}
Read_Chip_Memory[/Extract\n Chip\n Memory/]
Vulnerability_Exists{Vulnerability\n Exists?}
Exploit_Chip[Exploit\n Chip]
Find_Vuln[Find\n Vulnerability]
Start_Phase2 --> Chip_Locked
Chip_Locked -->|No| Read_Chip_Memory
Chip_Locked -->|Yes| Vulnerability_Exists
Vulnerability_Exists -->|Yes| Exploit_Chip
Vulnerability_Exists -->|No| Find_Vuln
end
subgraph RE_Induced-Fault [Fault Injection Workflow]
direction LR
subgraph FI_Side-Channel [Side Channel Analysis]; end
subgraph FI_Voltage [Voltage Fault Injection]; end
subgraph FI_EM [Electromagnetic Fault Injection]; end
FI_Side-Channel --> FI_Voltage
FI_Side-Channel --> FI_EM
end
subgraph RE_Microscope-Extraction [Microscope Workflow]
direction LR
ME_Sample-Preparation[Sample Preparation]
subgraph ME_Optical-Extraction [Optical Microscope]; end
subgraph ME_Electron-Extraction [Electron Microscope]; end
ME_Sample-Preparation --> ME_Optical-Extraction
ME_Sample-Preparation --> ME_Electron-Extraction
end
subgraph RE_Firmware [Firmware Reverse Engineering]
direction LR
subgraph FW_Tool-Selection [Tool Selection]; end
subgraph FW_Tool-Configuration [Tool Configuration]; end
subgraph FW_AI-Usage [Using AI]; end
subgraph FW_Beginner [Getting Started]; end
subgraph FW_Intermediate [Intermediate]; end
subgraph FW_Advanced [Advanced Techniques]; end
FW_Tool-Selection --> FW_Tool-Configuration --> FW_Beginner --> FW_Intermediate --> FW_Advanced
FW_Beginner --> FW_AI-Usage
end
RE_Physical-Analysis --> RE_Prog-Extraction
RE_Prog-Extraction --> RE_Induced-Fault
RE_Prog-Extraction --> RE_Microscope-Extraction
RE_Induced-Fault --> RE_Firmware
RE_Microscope-Extraction --> RE_Firmware
flowchart TD
subgraph RE_Physical-Analysis [Physical Analysis]
direction LR
Target_Selection([Target\n Selection]); click Target_Selection "https://www.mediawiki.org"
Identify_Components[Identify\n Components]; click Identify_Components "/view/Main_Page"
Create_Block_Diagram[/Create\n Block\n Diagram/]
Contains_Prog_IC{Contains\n Programmable\n IC?}
Complete_Documentation([Complete\n Documentation])
End_Phase1((Extract Data))
Target_Selection --> Identify_Components
Identify_Components --> Create_Block_Diagram --> Contains_Prog_IC -->|No| Complete_Documentation
Contains_Prog_IC -->|Yes| End_Phase1
end
subgraph RE_Prog-Extraction [Programmable Device Extraction]
direction LR
Start_Phase2((Extract Data))
Chip_Locked{Chip\n Locked?}
Read_Chip_Memory[/Extract\n Chip\n Memory/]
Vulnerability_Exists{Vulnerability\n Exists?}
Exploit_Chip[Exploit\n Chip]
Find_Vuln[Find\n Vulnerability]
Start_Phase2 --> Chip_Locked
Chip_Locked -->|No| Read_Chip_Memory
Chip_Locked -->|Yes| Vulnerability_Exists
Vulnerability_Exists -->|Yes| Exploit_Chip
Vulnerability_Exists -->|No| Find_Vuln
end
subgraph RE_Induced-Fault [Fault Injection Workflow]
direction LR
subgraph FI_Side-Channel [Side Channel Analysis]; end
subgraph FI_Voltage [Voltage Fault Injection]; end
subgraph FI_EM [Electromagnetic Fault Injection]; end
FI_Side-Channel --> FI_Voltage
FI_Side-Channel --> FI_EM
end
subgraph RE_Microscope-Extraction [Microscope Workflow]
direction LR
ME_Sample-Preparation[Sample Preparation]
subgraph ME_Optical-Extraction [Optical Microscope]; end
subgraph ME_Electron-Extraction [Electron Microscope]; end
ME_Sample-Preparation --> ME_Optical-Extraction
ME_Sample-Preparation --> ME_Electron-Extraction
end
subgraph RE_Firmware [Firmware Reverse Engineering]
direction LR
subgraph FW_Tool-Selection [Tool Selection]; end
subgraph FW_Tool-Configuration [Tool Configuration]; end
subgraph FW_AI-Usage [Using AI]; end
subgraph FW_Beginner [Getting Started]; end
subgraph FW_Intermediate [Intermediate]; end
subgraph FW_Advanced [Advanced Techniques]; end
FW_Tool-Selection --> FW_Tool-Configuration --> FW_Beginner --> FW_Intermediate --> FW_Advanced
FW_Beginner --> FW_AI-Usage
end
RE_Physical-Analysis --> RE_Prog-Extraction
RE_Prog-Extraction --> RE_Induced-Fault
RE_Prog-Extraction --> RE_Microscope-Extraction
RE_Induced-Fault --> RE_Firmware
RE_Microscope-Extraction --> RE_Firmware