Mermaid:RE FlowChart Overview: Difference between revisions
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Refining flowgraph |
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| Line 5: | Line 5: | ||
Identify_Components(Identify\n Components) | Identify_Components(Identify\n Components) | ||
Create_Block_Diagram[/Create\n Block\n Diagram/] | Create_Block_Diagram[/Create\n Block\n Diagram/] | ||
Contains_Prog_IC{Contains\n Programmable\n IC?} | |||
Complete_Documentation([Complete\n Documentation]) | |||
End_Phase1((A1)) | End_Phase1((A1)) | ||
end | end | ||
subgraph RE_Phase2 [Programmable Device Extraction] | subgraph RE_Phase2 [Programmable Device Extraction] | ||
direction LR | |||
Start_Phase2((A1)) | |||
Chip_Locked{Chip\n Locked?} | Chip_Locked{Chip\n Locked?} | ||
Read_Chip_Memory[/Extract\n Chip\n Memory/] | Read_Chip_Memory[/Extract\n Chip\n Memory/] | ||
Vulnerability_Exists{Vulnerability\n Exists?} | Vulnerability_Exists{Vulnerability\n Exists?} | ||
Exploit_Chip(Exploit\n Chip) | Exploit_Chip(Exploit\n Chip) | ||
Find_Vuln(Find\n Vulnerability) | |||
end | end | ||
Target_Selection --> Identify_Components | Target_Selection --> Identify_Components | ||
Identify_Components --> Create_Block_Diagram --> End_Phase1 | Identify_Components --> Create_Block_Diagram --> Contains_Prog_IC -->|No| Complete_Documentation | ||
Contains_Prog_IC -->|Yes| End_Phase1 | |||
RE_Phase1 --> RE_Phase2 | RE_Phase1 --> RE_Phase2 | ||
Start_Phase2 --> | Start_Phase2 --> Chip_Locked | ||
Chip_Locked -->|No| Read_Chip_Memory | Chip_Locked -->|No| Read_Chip_Memory | ||
Chip_Locked -->|Yes| Vulnerability_Exists | Chip_Locked -->|Yes| Vulnerability_Exists | ||
Revision as of 20:11, 18 September 2026
flowchart TD
subgraph RE_Phase1 [Physical Analysis]
direction LR
Target_Selection([Target\n Selection])
Identify_Components(Identify\n Components)
Create_Block_Diagram[/Create\n Block\n Diagram/]
Contains_Prog_IC{Contains\n Programmable\n IC?}
Complete_Documentation([Complete\n Documentation])
End_Phase1((A1))
end
subgraph RE_Phase2 [Programmable Device Extraction]
direction LR
Start_Phase2((A1))
Chip_Locked{Chip\n Locked?}
Read_Chip_Memory[/Extract\n Chip\n Memory/]
Vulnerability_Exists{Vulnerability\n Exists?}
Exploit_Chip(Exploit\n Chip)
Find_Vuln(Find\n Vulnerability)
end
Target_Selection --> Identify_Components
Identify_Components --> Create_Block_Diagram --> Contains_Prog_IC -->|No| Complete_Documentation
Contains_Prog_IC -->|Yes| End_Phase1
RE_Phase1 --> RE_Phase2
Start_Phase2 --> Chip_Locked
Chip_Locked -->|No| Read_Chip_Memory
Chip_Locked -->|Yes| Vulnerability_Exists
Vulnerability_Exists -->|Yes| Exploit_Chip
Vulnerability_Exists -->|No| Find_Vuln
click Target_Selection "https://www.mediawiki.org"
click Identify_Components "/view/Main_Page"
flowchart TD
subgraph RE_Phase1 [Physical Analysis]
direction LR
Target_Selection([Target\n Selection])
Identify_Components(Identify\n Components)
Create_Block_Diagram[/Create\n Block\n Diagram/]
Contains_Prog_IC{Contains\n Programmable\n IC?}
Complete_Documentation([Complete\n Documentation])
End_Phase1((A1))
end
subgraph RE_Phase2 [Programmable Device Extraction]
direction LR
Start_Phase2((A1))
Chip_Locked{Chip\n Locked?}
Read_Chip_Memory[/Extract\n Chip\n Memory/]
Vulnerability_Exists{Vulnerability\n Exists?}
Exploit_Chip(Exploit\n Chip)
Find_Vuln(Find\n Vulnerability)
end
Target_Selection --> Identify_Components
Identify_Components --> Create_Block_Diagram --> Contains_Prog_IC -->|No| Complete_Documentation
Contains_Prog_IC -->|Yes| End_Phase1
RE_Phase1 --> RE_Phase2
Start_Phase2 --> Chip_Locked
Chip_Locked -->|No| Read_Chip_Memory
Chip_Locked -->|Yes| Vulnerability_Exists
Vulnerability_Exists -->|Yes| Exploit_Chip
Vulnerability_Exists -->|No| Find_Vuln
click Target_Selection "https://www.mediawiki.org"
click Identify_Components "/view/Main_Page"