Roland DIF-AT

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Revision as of 08:53, 27 April 2026 by RSS1 (talk | contribs) (continued adding info to the page)
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[Page under construction - as yet incomplete]


PCB photos, Pinouts, Pin header, Device operation, Connections between subsystems. Notes on firmware structure, Machine language monitor program, DFU, firmware extraction, firmware update script (python)

Roland's page on the DIF-AT

rolands publicity image (still online)

Brief outline -

I bought this device to repair. They are rare, and interesting. It would not respond any longer or be recognised by host hardware. (it runs in conjunction with host digital mixer / host music production device, translating digital audio formats in real time)

I damaged a lot of traces on the device and gave up on it. However, I learned how to micro-solder and became inspired to continue the repair with reverse engineering techniques.

Given the device was already non-responsive (and now damaged) -

Goals-

  1. De-solder NOR Flash and read firmware.
  2. Determine potential corruption of firmware.
  3. Re-flash firmware onto new NOR flash (if good).
  4. Determine operation / potential corruption of Xilinx CPLD and/or Alesis OTP? IC - read contents if possible.
  5. Analyse firmware for anything interesting.
  6. Determine and examine / analyse hardware architecture.
  7. Repair traces, replace ICs. Test.
  8. Collate information, share research and findings.

PCB Photos -

  • Main board

  • Cpu (not mcu!)

  • Main board, alt

  • SRAM + NOR Flash (512kb)

  • Custom Alesis chip OTP?

  • TDIF daughter board


Device Overview

This is a complex device with a 16 bit CPU, Xilinx 95xx CPLD, Custom Alesis chip (Gate array, PAL, GAL, OTP CPLD?) SRAM, NOR flash 512kb, logic and switching for bus arbitration. BREQ Bus request is a very involved circuit. Also CE# Chip Enable NOR Flash is connected through a complicated muxing circuit.

It has 2 buttons on the PCB: 1 - RESET, reset circuit and IC 2 - Launch monitor diagnostic mode. 50 pin header provides easy access to most address lines and relevant (to operation) CPU/RAM/Flash lines. This will be convenient to run a logic capture during boot and operation later.

I mapped out the 50 pin connector -



Extract Firmware

In the past I've done firmware upgrades on synths, so I used a TL48 programmer with a 48pin TTSOP



[more is coming, I'll continue editing this page in the coming days]

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