23
edits
Changes
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m
|
|-
|9, 10, 15, 16, 19, 20, 33, 34
|Ground
|
|-
|2, 8, 18*, 24, 30
| +5VDC
|18 needs more research, may occasionally drop to ground?
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|-
|-
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|-
Reformatted Card Edge Connector
{| class="wikitable"
|+Card edge - 40-pin, looks like ISA spacing
!Pin Number
!Function
!Notes / Observations
!Pin Number
!Function
!Notes / Observations
|-
|1,|Vdd|U3 - VddU15 - Pin 4|2,7,8|Vdd
|U3 - Vdd
U15 - Pin 4
|-
|3
U21 - Pin21 / PCLK
|
|4
|U3 - Pin38/Vpp/ICCSEL
|U3 - Pin39/RESET
|
|6
|U3 - Pin27 / PC4 / MISO / ICCDATA
|
|-
|7
|Vdd
|U3 - Vdd
U15 - Pin 4
|8
|Vdd
|U3 - Vdd
U15 - Pin 4
|-
|9
|GND
|
|10
|GND
|
|-
|J5 - Pin 2
|
|12
|U21 - Pin 20 - DCLK
|13
|SW1.4
|U3 - Pin10/AIN3/PD3
51K resistor to ground
|14
|
|
|-
|15
|GND
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|16
|GND
|
|-
|17
|SW1.2
|U3 - Pin8/AIN1/PD1
51K resistor to ground
|18
|SW1.1
|U3 - Pin7/AIN0/PD0
51K resistor to ground
|-
|19
|GND
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|20
|GND
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|-
U3 - Pin19
|Appears to be some sort of test-mode select, checked before GPIO initialization.
|22
|
|
|-
|23
U3 - Pin1/RDI
|Data bursts
|24
|
| +5VDC ?
|-
|25
|
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|26
|GPS Data (38400 BPS)
Maybe not connected to U3?
|Data bursts
|-
|27
|
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|28
|
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|-
|29
|
|
|30
|
| +5VDC ?
|-
|31
|BATT POS
|
|32
|
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|-
|33
|GND
|
|34
|GND
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|-
|35
|
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|36
|SW1.3
|U3 - Pin9/AIN2/PD2
51K resistor to ground
|-
|37
|
|
|38
|U3 - Pin18 / OCMP1_A / AIN10 / PF4
|RED WIRE
|
|40
|Battery voltage
ST7 ADC AIN8 appears to be the only one used.
=== Interrupts ===
* ei0_int** Triggered by PortA.3** uses location 0xB2 as a shift register to output LSB first to CC1050's Data Input on PortF.4
==Modifications==
